GPIOC Pin Assignment
The GPIOC Register Port is shared with the higher 16 bit of the 32 bit SDRAM Bus.
You can only use the GPIOs if you have only 16 bit SDRAM Bus width.
|
GPIO Pins
|
|||
|
GPIOC
|
SHARED
|
208 QFP
|
256 BGA
|
|---|---|---|---|
|
GPCPIN[0]
|
MDP1N[16]
|
186
|
N2
|
|
GPCPIN[1]
|
MDP1N[17]
|
187
|
P1
|
|
GPCPIN[2]
|
MDP1N[18]
|
191
|
P2
|
|
GPCPIN[3]
|
MDP1N[19]
|
192
|
P4
|
|
GPCPIN[4]
|
MDP1N[20]
|
193
|
R1
|
|
GPCPIN[5]
|
MDP1N[21]
|
194
|
R2
|
|
GPCPIN[6]
|
MDP1N[22]
|
195
|
P3
|
|
GPCPIN[7]
|
MDP1N[23]
|
196
|
R3
|
|
GPCPIN[8]
|
MDP1N[24]
|
197
|
T1
|
|
GPCPIN[9]
|
MDP1N[25]
|
198
|
T2
|
|
GPCPIN[10]
|
MDP1N[26]
|
199
|
T3
|
|
GPCPIN[11]
|
MDP1N[27]
|
203
|
U2
|
|
GPCPIN[12]
|
MDP1N[28]
|
204
|
U3
|
|
GPCPIN[13]
|
MDP1N[29]
|
205
|
T4
|
|
GPCPIN[14]
|
MDP1N[30]
|
206
|
V2
|
|
GPCPIN[15]
|
MDP1N[31]
|
207
|
V3
|
GPIOC Pins